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Kunle Olukotun: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. John D. Davis, James Laudon, Kunle Olukotun
    Maximizing CMP Throughput with Mediocre Cores. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2005, pp:51-62 [Conf]
  2. Michael K. Chen, Kunle Olukotun
    Exploiting Method-Level Parallelism in Single-Threaded Java Programs. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 1998, pp:176-0 [Conf]
  3. Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi, Austen McDonald, Christos Kozyrakis, Kunle Olukotun
    Testing implementations of transactional memory. [Citation Graph (0, 0)][DBLP]
    PACT, 2006, pp:134-143 [Conf]
  4. Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Brian D. Carlstrom, Lance Hammond, Christos Kozyrakis, Kunle Olukotun
    Characterization of TCC on Chip-Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE PACT, 2005, pp:63-74 [Conf]
  5. Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
    The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors. [Citation Graph (0, 0)][DBLP]
    ARVLSI, 1997, pp:303-319 [Conf]
  6. Lance Hammond, Brian D. Carlstrom, Vicky Wong, Ben Hertzberg, Michael K. Chen, Christos Kozyrakis, Kunle Olukotun
    Programming with transactional coherence and consistency (TCC). [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2004, pp:1-13 [Conf]
  7. Lance Hammond, Mark Willey, Kunle Olukotun
    Data Speculation Support for a Chip Multiprocessor. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1998, pp:58-69 [Conf]
  8. Kunle Olukotun, Basem A. Nayfeh, Lance Hammond, Kenneth G. Wilson, Kunyung Chang
    The Case for a Single-Chip Multiprocessor. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1996, pp:2-11 [Conf]
  9. JaeWoong Chung, Chi Cao Minh, Austen McDonald, Travis Skare, Hassan Chafi, Brian D. Carlstrom, Christos Kozyrakis, Kunle Olukotun
    Tradeoffs in transactional memory virtualization. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 2006, pp:371-381 [Conf]
  10. Michael K. Chen, Kunle Olukotun
    TEST: A Tracer for Extracting Speculative Thread. [Citation Graph (0, 0)][DBLP]
    CGO, 2003, pp:301-314 [Conf]
  11. Valeria Bertacco, Kunle Olukotun
    Efficient state representation for symbolic simulation. [Citation Graph (0, 0)][DBLP]
    DAC, 2002, pp:99-104 [Conf]
  12. Robert S. French, Monica S. Lam, Jeremy R. Levitt, Kunle Olukotun
    A General Method for Compiling Event-Driven Simulations. [Citation Graph (0, 0)][DBLP]
    DAC, 1995, pp:151-156 [Conf]
  13. Jeremy R. Levitt, Kunle Olukotun
    A Scalable Formal Verification Methodology for Pipelined Microprocessors. [Citation Graph (0, 0)][DBLP]
    DAC, 1996, pp:558-563 [Conf]
  14. Kunle Olukotun, Mark Heinrich, David Ofelt
    Digital System Simulation: Methodologies and Examples. [Citation Graph (0, 0)][DBLP]
    DAC, 1998, pp:658-663 [Conf]
  15. Kunle Olukotun, Trevor N. Mudge
    A Preliminary Investigation into Parallel Routing on a Hypercube Computer. [Citation Graph (0, 0)][DBLP]
    DAC, 1987, pp:814-820 [Conf]
  16. Karem A. Sakallah, Trevor N. Mudge, Kunle Olukotun
    Analysis and Design of Latch-Controlled Synchronous Digital Circuits. [Citation Graph (0, 0)][DBLP]
    DAC, 1990, pp:111-117 [Conf]
  17. Takashi Miyamori, Kunle Olukotun
    A Quantitative Analysis of Reconfigurable Coprocessors for Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:2-11 [Conf]
  18. Takashi Miyamori, Kunle Olukotun
    REMARC: Reconfigurable Multimedia Array Coprocessor (Abstract). [Citation Graph (0, 0)][DBLP]
    FPGA, 1998, pp:261- [Conf]
  19. Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy Teslyar, Daxia Ge, Christos Kozyrakis, Kunle Olukotun
    A practical FPGA-based framework for novel CMP research. [Citation Graph (0, 0)][DBLP]
    FPGA, 2007, pp:116-125 [Conf]
  20. Kunle Olukotun
    A New Approach to Programming and Prototyping Parallel Systems. [Citation Graph (0, 0)][DBLP]
    HiPC, 2005, pp:4- [Conf]
  21. Basem A. Nayfeh, Kunle Olukotun, Jaswinder Pal Singh
    The Impact of Shared-Cache Clustering in Small-Scale Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    HPCA, 1996, pp:74-84 [Conf]
  22. Rachid Helaihel, Kunle Olukotun
    Java as a specification language for hardware-software systems. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:690-697 [Conf]
  23. Rachid Helaihel, Kunle Olukotun
    JMTP: an architecture for exploiting concurrency in embedded Java applications with real-time considerations. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1999, pp:551-557 [Conf]
  24. Jeremy R. Levitt, Kunle Olukotun
    Verifying correct pipeline implementation for microprocessors. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1997, pp:162-169 [Conf]
  25. Karem A. Sakallah, Trevor N. Mudge, Kunle Olukotun
    check Tc and min Tc: Timing Verification and Optimal Clocking of Synchronous Digtal Circuits. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:552-555 [Conf]
  26. Hassan Chafi, Chi Cao Minh, Austen McDonald, Brian D. Carlstrom, JaeWoong Chung, Lance Hammond, Christos Kozyrakis, Kunle Olukotun
    TAPE: a transactional application profiling environment. [Citation Graph (0, 0)][DBLP]
    ICS, 2005, pp:199-208 [Conf]
  27. Kunle Olukotun, Lance Hammond, Mark Willey
    Improving the performance of speculatively parallel applications on the Hydra CMP. [Citation Graph (0, 0)][DBLP]
    International Conference on Supercomputing, 1999, pp:21-30 [Conf]
  28. Ayodele Thomas, Kunle Olukotun
    An Application Analysis Framework For Polymorphic Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  29. Michael K. Chen, Kunle Olukotun
    The Jrpm System for Dynamically Parallelizing Java Programs. [Citation Graph (0, 0)][DBLP]
    ISCA, 2003, pp:434-445 [Conf]
  30. Lance Hammond, Vicky Wong, Michael K. Chen, Brian D. Carlstrom, John D. Davis, Ben Hertzberg, Manohar K. Prabhu, Honggo Wijaya, Christos Kozyrakis, Kunle Olukotun
    Transactional Memory Coherence and Consistency. [Citation Graph (0, 0)][DBLP]
    ISCA, 2004, pp:102-113 [Conf]
  31. Austen McDonald, JaeWoong Chung, Brian D. Carlstrom, Chi Cao Minh, Hassan Chafi, Christos Kozyrakis, Kunle Olukotun
    Architectural Semantics for Practical Transactional Memory. [Citation Graph (0, 0)][DBLP]
    ISCA, 2006, pp:53-65 [Conf]
  32. Kunle Olukotun, Trevor N. Mudge, Richard B. Brown
    Implementing a Cache for a High-Performance GaAs Microprocessor. [Citation Graph (0, 0)][DBLP]
    ISCA, 1991, pp:138-147 [Conf]
  33. Kunle Olukotun, Trevor N. Mudge, Richard B. Brown
    Performance Optimization of Pipelined Primary Caches. [Citation Graph (0, 0)][DBLP]
    ISCA, 1992, pp:181-190 [Conf]
  34. Basem A. Nayfeh, Lance Hammond, Kunle Olukotun
    Evaluation of Design Alternatives for a Multiprocessor Microprocessor. [Citation Graph (0, 0)][DBLP]
    ISCA, 1996, pp:67-77 [Conf]
  35. Basem A. Nayfeh, Kunle Olukotun
    Exploring the Design Space for a Shared-Cache Multiprocessor. [Citation Graph (0, 0)][DBLP]
    ISCA, 1994, pp:166-175 [Conf]
  36. Kenneth M. Wilson, Kunle Olukotun
    Designing High Bandwidth On-Chip Caches. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:121-132 [Conf]
  37. Kenneth M. Wilson, Kunle Olukotun, Mendel Rosenblum
    Increasing Cache Port Efficiency for Dynamic Superscalar Microprocessors. [Citation Graph (0, 0)][DBLP]
    ISCA, 1996, pp:147-157 [Conf]
  38. Michael K. Chen, Kunle Olukotun
    Targeting Dynamic Compilation for Embedded Environments. [Citation Graph (0, 0)][DBLP]
    Java™ Virtual Machine Research and Technology Symposium, 2002, pp:151-164 [Conf]
  39. Brad Schumitsch, Sebastian Thrun, Gary R. Bradski, Kunle Olukotun
    The Information-Form Data Association Filter. [Citation Graph (0, 0)][DBLP]
    NIPS, 2005, pp:- [Conf]
  40. Brian D. Carlstrom, Austen McDonald, Hassan Chafi, JaeWoong Chung, Chi Cao Minh, Christoforos E. Kozyrakis, Kunle Olukotun
    The Atomos transactional programming language. [Citation Graph (0, 0)][DBLP]
    PLDI, 2006, pp:1-13 [Conf]
  41. Manohar K. Prabhu, Kunle Olukotun
    Using thread-level speculation to simplify manual parallelization. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2003, pp:1-12 [Conf]
  42. Manohar K. Prabhu, Kunle Olukotun
    Exposing speculative thread parallelism in SPEC2000. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2005, pp:142-152 [Conf]
  43. Brian D. Carlstrom, Austen McDonald, Michael Carbin, Christos Kozyrakis, Kunle Olukotun
    Transactional collection classes. [Citation Graph (0, 0)][DBLP]
    PPOPP, 2007, pp:56-67 [Conf]
  44. Andrew Erlichson, Basem A. Nayfeh, Jaswinder Pal Singh, Kunle Olukotun
    The Benefits of Clustering in Shared Address Space Multiprocessors: An Applications-Driven Investigation. [Citation Graph (0, 0)][DBLP]
    SC, 1995, pp:- [Conf]
  45. Brad Schumitsch, Sebastian Thrun, Leonidas J. Guibas, Kunle Olukotun
    The Identity Management Kalman Filter (IMKF). [Citation Graph (0, 0)][DBLP]
    Robotics: Science and Systems, 2006, pp:- [Conf]
  46. Lance Hammond, Basem A. Nayfeh, Kunle Olukotun
    A Single-Chip Multiprocessor. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:9, pp:79-85 [Journal]
  47. Trevor N. Mudge, Richard B. Brown, William P. Bimingham, Jeffrey A. Dykstra, Ayman I. Kayssi, Ronald J. Lomax, Kunle Olukotun, Karem A. Sakallah, Raymond A. Milano
    The Design of a Microsupercomputer. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1991, v:24, n:1, pp:57-64 [Journal]
  48. Michael K. Chen, Kunle Olukotun
    The Jrpm System for Dynamically Parallelizing Sequential Java Programs. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:26-35 [Journal]
  49. Lance Hammond, Brian D. Carlstrom, Vicky Wong, Michael K. Chen, Christos Kozyrakis, Kunle Olukotun
    Transactional Coherence and Consistency: Simplifying Parallel Hardware and Software. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:6, pp:92-103 [Journal]
  50. Lance Hammond, Benedict A. Hubbert, Michael Siu, Manohar K. Prabhu, Michael K. Chen, Kunle Olukotun
    The Stanford Hydra CMP. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:2, pp:71-84 [Journal]
  51. Poonacha Kongetira, Kathirgamar Aingaran, Kunle Olukotun
    Niagara: A 32-Way Multithreaded Sparc Processor. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2005, v:25, n:2, pp:21-29 [Journal]
  52. Kunle Olukotun, Lance Hammond
    The future of microprocessors. [Citation Graph (0, 0)][DBLP]
    ACM Queue, 2005, v:3, n:7, pp:26-29 [Journal]
  53. Brian D. Carlstrom, JaeWoong Chung, Hassan Chafi, Austen McDonald, Chi Cao Minh, Lance Hammond, Christoforos E. Kozyrakis, Kunle Olukotun
    Executing Java programs with transactional memory. [Citation Graph (0, 0)][DBLP]
    Sci. Comput. Program., 2006, v:63, n:2, pp:111-129 [Journal]
  54. John D. Davis, Stephen E. Richardson, Charis Charitsis, Kunle Olukotun
    A chip prototyping substrate: the flexible architecture for simulation and testing (FAST). [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2005, v:33, n:4, pp:34-43 [Journal]
  55. Kunle Olukotun, Trevor N. Mudge, Richard B. Brown
    Multilevel Optimization of Pipelined Caches. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1997, v:46, n:10, pp:1083-1102 [Journal]
  56. Kenneth M. Wilson, Kunle Olukotun
    High Bandwidth On-Chip Cache Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:4, pp:292-307 [Journal]
  57. Njuguna Njoroge, Jared Casper, Sewook Wee, Yuriy Teslyar, Daxia Ge, Christos Kozyrakis, Kunle Olukotun
    ATLAS: a chip-multiprocessor with transactional memory support. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:3-8 [Conf]
  58. Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Austen McDonald, Nathan Bronson, Jared Casper, Christos Kozyrakis, Kunle Olukotun
    An effective hybrid transactional memory system with strong isolation guarantees. [Citation Graph (0, 0)][DBLP]
    ISCA, 2007, pp:69-80 [Conf]
  59. Cheng-Tao Chu, Sang Kyun Kim, Yi-An Lin, YuanYuan Yu, Gary R. Bradski, Andrew Y. Ng, Kunle Olukotun
    Map-Reduce for Machine Learning on Multicore. [Citation Graph (0, 0)][DBLP]
    NIPS, 2006, pp:281-288 [Conf]
  60. Woongki Baek, JaeWoong Chung, Chi Cao Minh, Christos Kozyrakis, Kunle Olukotun
    Towards soft optimization techniques for parallel cognitive applications. [Citation Graph (0, 0)][DBLP]
    SPAA, 2007, pp:59-60 [Conf]
  61. Austen McDonald, Brian D. Carlstrom, JaeWoong Chung, Chi Cao Minh, Hassan Chafi, Christos Kozyrakis, Kunle Olukotun
    Transactional Memory: The Hardware-Software Interface. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2007, v:27, n:1, pp:67-76 [Journal]

  62. The OpenTM Transactional Application Programming Interface. [Citation Graph (, )][DBLP]


  63. A highly scalable Restricted Boltzmann Machine FPGA implementation. [Citation Graph (, )][DBLP]


  64. A Scalable, Non-blocking Approach to Transactional Memory. [Citation Graph (, )][DBLP]


  65. The common case transactional behavior of multithreaded programs. [Citation Graph (, )][DBLP]


  66. Making nested parallel transactions practical using lightweight hardware support. [Citation Graph (, )][DBLP]


  67. Transactional predication: high-performance concurrent sets and maps for STM. [Citation Graph (, )][DBLP]


  68. Feedback-directed barrier optimization in a strongly isolated STM. [Citation Graph (, )][DBLP]


  69. A practical concurrent binary search tree. [Citation Graph (, )][DBLP]


  70. Extreme scale computing: challenges and opportunities. [Citation Graph (, )][DBLP]


  71. Improving software concurrency with hardware-assisted memory snapshot. [Citation Graph (, )][DBLP]


  72. Ased: availability, security, and debugging support usingtransactional memory. [Citation Graph (, )][DBLP]


  73. Implementing and evaluating nested parallel transactions in software transactional memory. [Citation Graph (, )][DBLP]


  74. STAMP: Stanford Transactional Applications for Multi-Processing. [Citation Graph (, )][DBLP]


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