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Michael Nicolaidis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. H. Bederr, Michael Nicolaidis, Alain Guyot
    Analytic approach for error masking elimination in on-line multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1995, pp:30-37 [Conf]
  2. Michael Nicolaidis, Rubin A. Parekhji, M. Boudjit
    E-Groups: A New Technique for Fast Backward Propagation in System Level Test Generation. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1996, pp:34-41 [Conf]
  3. J. Velasco-Medina, Marcelo Lubaszewski, Michael Nicolaidis
    An Approach to the On-Line Testing of Operational Amplifiers. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1998, pp:290-295 [Conf]
  4. Lorena Anghel, Michael Nicolaidis
    Cost Reduction and Evaluation of a Temporary Faults Detecting Technique. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:591-598 [Conf]
  5. Eric Dupont, Michael Nicolaidis, Peter Rohr
    Embedded Robustness Ips. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:244-247 [Conf]
  6. Balkaran S. Gill, Michael Nicolaidis, Francis G. Wolff, Christos A. Papachristou, Steven L. Garverick
    An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:592-597 [Conf]
  7. Michael Nicolaidis
    IP for Embedded Robustness. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:240-241 [Conf]
  8. Michael Nicolaidis, Nadir Achouri, Slimane Boutobza
    Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10590-10595 [Conf]
  9. Michael Nicolaidis, Ricardo de Oliveira Duarte
    Design of Fault-Secure Parity-Prediction Booth Multipliers. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:7-14 [Conf]
  10. Michael Nicolaidis, Yervant Zorian
    Scaling Deeper to Submicron: On-Line Testing to the Rescue. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:432-0 [Conf]
  11. Issam Alzaher-Noufal, Michael Nicolaidis
    A CAD Framework for Generating Self-Checking 1 Multipliers Based on Residue Codes. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:122-0 [Conf]
  12. Iyad Rayane, J. Velasco-Medina, Michael Nicolaidis
    A One-Bit-Signature BIST for Embedded Operational Amplifiers in Mixed-Signal Circuits Based on the Slew-Rate Detection. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:792-0 [Conf]
  13. J. Velasco-Medina, Th. Calin, Michael Nicolaidis
    Fault Detection for Linear Analog Circuits Using Current Injection. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:987-0 [Conf]
  14. Yervant Zorian, Michael Nicolaidis, Peter Muhmenthaler, David Y. Lepejian, Chris W. H. Strolenberg, Kees Veelenturf
    Tutorial Statement. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:66- [Conf]
  15. Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis
    New Methods for Evaluating the Impact of Single Event Transients in VDSM ICs. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:99-107 [Conf]
  16. Eleftherios Kolonis, Michael Nicolaidis
    Fail-Safe Synchronization Circuit for Duplicated Systems. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:412-417 [Conf]
  17. Michael Nicolaidis, Nadir Achouri, Lorena Anghel
    A Memory Built-In Self-Repair for High Defect Densities Based on Error Polarities. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:459-466 [Conf]
  18. Michael Nicolaidis, H. Bederr
    Efficient Implementations of Self-Checking Multiply and Divide Arrays. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:574-579 [Conf]
  19. Ricardo de Oliveira Duarte, Michael Nicolaidis
    A Test Methodology Applied to Cellular Logic Programmable Gate Arrays. [Citation Graph (0, 0)][DBLP]
    FPL, 1994, pp:11-22 [Conf]
  20. Jien-Chung Lo, James C. Daly, Michael Nicolaidis
    Design of Static CMOS Self-Checking Circuits using Built-In Current Sensing. [Citation Graph (0, 0)][DBLP]
    FTCS, 1992, pp:104-111 [Conf]
  21. Michael Nicolaidis
    Efficient Implementations of Self-Checking Adders and ALUs. [Citation Graph (0, 0)][DBLP]
    FTCS, 1993, pp:586-595 [Conf]
  22. F. L. Vargas, Michael Nicolaidis
    SEU-Tolerant SRAM Design Based on Current Monitoring. [Citation Graph (0, 0)][DBLP]
    FTCS, 1994, pp:106-115 [Conf]
  23. Haridimos T. Vergos, Dimitris Nikolos, Y. Tsiatouhas, Th. Haniotakis, Michael Nicolaidis
    On Path Delay Fault Testing of Multiplexer - Based Shifters. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1999, pp:20-23 [Conf]
  24. Vladimir Castro Alves, Michael Nicolaidis, P. Lestrat, Bernard Courtois
    Built-In Self-Test for Multi-Port RAMs. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1991, pp:248-251 [Conf]
  25. Michael Nicolaidis, Nadir Achouri, Slimane Boutobza
    Dynamic Data-bit Memory Built-In Self- Repair. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2003, pp:588-594 [Conf]
  26. O. Kebichi, Michael Nicolaidis
    A Tool for Automatic Generation of BISTed and Transparent BISTed Rams. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:570-575 [Conf]
  27. Michael Nicolaidis, M. Boudjit
    New Implementations, Tools, and Experiments for Decreasing Self-Checking PLAs Area Overhead. [Citation Graph (0, 0)][DBLP]
    ICCD, 1991, pp:275-281 [Conf]
  28. F. L. Vargas, Michael Nicolaidis, Bernard Courtois
    Quiescent Current Monitoring to Improve the Reliability of Electronic Systems in Space Radiation Environments. [Citation Graph (0, 0)][DBLP]
    ICCD, 1993, pp:596-600 [Conf]
  29. J. Velasco-Medina, Iyad Rayane, Michael Nicolaidis
    On-Line BIST for Testing Analog Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:330-0 [Conf]
  30. Michael Nicolaidis, Nadir Achouri, Lorena Anghel
    Memory Built-In Self-Repair for Nanotechnologies. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2003, pp:94-0 [Conf]
  31. Michael Nicolaidis, N. Zaidan, Th. Calin, D. Bied-Charreton
    ISIS: A Fail-Safe Interface Realized in Smart Power Technology. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2000, pp:191-0 [Conf]
  32. Michael Nicolaidis
    Design for Mitigation of Single Event Effects. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2005, pp:95-96 [Conf]
  33. Balkaran S. Gill, Michael Nicolaidis, Christos A. Papachristou
    Radiation Induced Single-Word Multiple-Bit Upsets Correction in SRAM. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2005, pp:266-271 [Conf]
  34. Lorena Anghel, Michael Nicolaidis
    Simulation and Mitigation of Single Event Effects. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2005, pp:81- [Conf]
  35. Michael Nicolaidis
    A Low-Cost Single-Event Latchup Mitigation Sscheme. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2006, pp:111-118 [Conf]
  36. Lorena Anghel, Michael Nicolaidis, Nadine Buard
    From Nuclear Reaction to System Failures: Can We Address All Levels of Soft Errors Accurately? [Citation Graph (0, 0)][DBLP]
    IOLTS, 2006, pp:85- [Conf]
  37. Th. Calin, F. L. Vargas, Michael Nicolaidis
    Upset-Tolerant CMOS SRAM Using Current Monitoring: Prototype and Test Experiments. [Citation Graph (0, 0)][DBLP]
    ITC, 1995, pp:45-53 [Conf]
  38. Eric Dupont, Michael Nicolaidis
    Robustness IPs for Reliability and Security of SoCs. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:357-364 [Conf]
  39. O. Kebichi, Michael Nicolaidis, Vyacheslav N. Yarmolik
    Exact Aliasing Computation for RAM BIST. [Citation Graph (0, 0)][DBLP]
    ITC, 1995, pp:13-22 [Conf]
  40. Michael Nicolaidis
    Reliability Threats in VDSM - Shortcomings in Conventional Test and Fault-Tolerance Alternatives. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:1282- [Conf]
  41. Michael Nicolaidis
    Transparent BIST for RAMs. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:598-607 [Conf]
  42. Michael Nicolaidis
    On-Line Testing for VLSI. [Citation Graph (0, 0)][DBLP]
    ITC, 1997, pp:1042- [Conf]
  43. Michael Nicolaidis
    Scaling Deeper to Submicron: On-Line Testing to the Rescue. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:1139- [Conf]
  44. Michael Nicolaidis
    Design for soft-error robustness to rescue deep submicron scaling. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:1140- [Conf]
  45. Fabian Vargas, Michael Nicolaidis, Yervant Zorian
    An Approach for Designing Total-Dose Tolerant MCMs Based on Current Monitoring. [Citation Graph (0, 0)][DBLP]
    ITC, 1995, pp:345-354 [Conf]
  46. Vyacheslav N. Yarmolik, Michael Nicolaidis, O. Kebichi
    Aliasing-free Signature Analysis for RAM BIST. [Citation Graph (0, 0)][DBLP]
    ITC, 1994, pp:368-377 [Conf]
  47. Michael Nicolaidis
    Soft Error Protection for Embedded Memories. [Citation Graph (0, 0)][DBLP]
    MTDT, 2002, pp:- [Conf]
  48. Lorena Anghel, Nadir Achouri, Michael Nicolaidis
    Evaluation of Memory Built-in Self Repair Techniques for High Defect Density Technologie. [Citation Graph (0, 0)][DBLP]
    PRDC, 2004, pp:315-320 [Conf]
  49. Lorena Anghel, Michael Nicolaidis, Issam Alzaher-Noufal
    Self-Checking Circuits versus Realistic Faults in Very Deep Submicron. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:55-66 [Conf]
  50. Th. Calin, Lorena Anghel, Michael Nicolaidis
    Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:135-142 [Conf]
  51. R. L. Campbell, P. Kuekes, David Y. Lepejian, W. Maly, Michael Nicolaidis, Alex Orailoglu
    Can Defect-Tolerant Chips Better Meet the Quality Challenge? [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:362-363 [Conf]
  52. Jim Chung, N. Derhacobian, Jean Gasiot, Michael Nicolaidis, David Towne, R. Velazco
    Soft Errors and Tolerance for Soft Errors. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:279-280 [Conf]
  53. B. Hamdi, H. Bederr, Michael Nicolaidis
    A tool for automatic generation of self-checking data paths. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:460-466 [Conf]
  54. Salvador Manich, Michael Nicolaidis, Joan Figueras
    Enhancing realistic fault secureness in parity prediction array arithmetic operators by I/sub DDQ/ monitoring. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:124-129 [Conf]
  55. Michael Nicolaidis
    Session Abstract. [Citation Graph (0, 0)][DBLP]
    VTS, 2006, pp:286-287 [Conf]
  56. Michael Nicolaidis
    Time Redundancy Based Soft-Error Tolerance to Rescue Nanometer Technologies. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:86-94 [Conf]
  57. Michael Nicolaidis, Nadir Achouri, Lorena Anghel
    A Diversified Memory Built-In Self-Repair Approach for Nanotechnologies. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:313-318 [Conf]
  58. Iyad Rayane, J. Velasco-Medina, Michael Nicolaidis
    A Digital BIST for Operational Amplifiers Embedded in Mixed-Signal Circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:304-310 [Conf]
  59. Eric Dupont, Michael Nicolaidis, Peter Rohr
    Embedded Robustness IPs for Transient-Error-Free ICs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:3, pp:56-70 [Journal]
  60. Ramesh Karri, Michael Nicolaidis
    Guest Editors' Introduction: Online VLSI Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:4, pp:12-16 [Journal]
  61. Michael Nicolaidis, Ricardo de Oliveira Duarte
    Fault-Secure Parity Prediction Booth Multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:3, pp:90-101 [Journal]
  62. Michael Nicolaidis, Ricardo de Oliveira Duarte, Salvador Manich, Joan Figueras
    Fault-Secure Parity Prediction Arithmetic Operators. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:60-71 [Journal]
  63. Michael Nicolaidis
    On-line testing for VLSI: state of the art and trends. [Citation Graph (0, 0)][DBLP]
    Integration, 1998, v:26, n:1-2, pp:197-209 [Journal]
  64. Michael Nicolaidis
    Theory of Transparent BIST for RAMs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:10, pp:1141-1156 [Journal]
  65. Michael Nicolaidis
    Fail-Safe Interfaces for VLSI: Theoretical Foundations and Implementation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:1, pp:62-77 [Journal]
  66. Michael Nicolaidis, Bernard Courtois
    Strongly Code Disjoint Checkers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:6, pp:751-756 [Journal]
  67. Jien-Chung Lo, James C. Daly, Michael Nicolaidis
    A strongly code disjoint built-in current sensor for strongly fault-secure static CMOS realizations. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:11, pp:1402-1407 [Journal]
  68. Jien-Chung Lo, Suchai Thanawastien, T. R. N. Rao, Michael Nicolaidis
    An SFS Berger check prediction ALU and its application to self-checking processor designs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1992, v:11, n:4, pp:525-540 [Journal]
  69. Michael Nicolaidis
    Self-exercising checkers for unified built-in self-test (UBIST). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:3, pp:203-218 [Journal]
  70. Michael Nicolaidis
    Fault secure property versus strongly code disjoint checkers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1994, v:13, n:5, pp:651-658 [Journal]
  71. Jean Arlat, Ravishankar K. Iyer, Michael Nicolaidis
    Workshop on Dependable and Secure Nanocomputing. [Citation Graph (0, 0)][DBLP]
    DSN, 2007, pp:809-810 [Conf]
  72. Michael Nicolaidis
    GRAAL: A Fault-Tolerant Architecture for Enabling Nanometric Technologies. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2007, pp:255- [Conf]
  73. Lorena Anghel, Michael Nicolaidis
    Defects Tolerant Logic Gates for Unreliable Future Nanotechnologies. [Citation Graph (0, 0)][DBLP]
    IWANN, 2007, pp:422-429 [Conf]
  74. Slimane Boutobza, Michael Nicolaidis, Kheiredine M. Lamara, Andrea Costa
    A Transparent based Programmable Memory BIST. [Citation Graph (0, 0)][DBLP]
    European Test Symposium, 2006, pp:89-96 [Conf]
  75. Michael Nicolaidis, Vladimir Castro Alves, H. Bederr
    Testing complex couplings in multiport memories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1995, v:3, n:1, pp:59-71 [Journal]
  76. Michael Nicolaidis
    Carry checking/parity prediction adders and ALUs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2003, v:11, n:1, pp:121-128 [Journal]
  77. Michael Nicolaidis, Lorena Anghel, Nadir Achouri
    Memory Defect Tolerance Architectures for Nanotechnologies. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2005, v:21, n:4, pp:445-455 [Journal]

  78. Fault-secure shifter design: results and implementations. [Citation Graph (, )][DBLP]


  79. Second workshop on dependable and secure nanocomputing. [Citation Graph (, )][DBLP]


  80. Third workshop on dependable and secure nanocomputing. [Citation Graph (, )][DBLP]


  81. Special Session 2: Benchmarking and Standardization in Software-Based SER Characterization: Towards an IEEE Task Force? [Citation Graph (, )][DBLP]


  82. Enhanced self-configurability and yield in multicore grids. [Citation Graph (, )][DBLP]


  83. An effective approach to detect logic soft errors in digital circuits based on GRAAL. [Citation Graph (, )][DBLP]


  84. A New Placement Algorithm Dedicated to Parallel Computers: Bases and Application. [Citation Graph (, )][DBLP]


  85. Low-Cost Highly-Robust Hardened Cells Using Blocking Feedback Transistors. [Citation Graph (, )][DBLP]


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