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Title:
Author:
Fabrizio Lombardi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yinlei Yu, Jian Xu, Wei-Kang Huang, Fabrizio Lombardi
    Diagnosing Single Faults for Interconnects in SRAM Based FPGAs. [Citation Graph (0, 0)][DBLP]
    ASP-DAC, 1999, pp:283-286 [Conf]
  2. Wenyi Feng, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi
    Fault Detection in a Tristate System Environment. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1998, pp:253-258 [Conf]
  3. Wenyi Feng, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi
    A BIST TPG Approach for Interconnect Testing With the IEEE 1149.1 STD. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:95-100 [Conf]
  4. Wei-Kang Huang, M. Y. Zhang, Fred J. Meyer, Fabrizio Lombardi
    A XOR-Tree Based Technique for Constant Testability of Configurable FPGAs. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1997, pp:248-253 [Conf]
  5. Bin Liu, Fabrizio Lombardi, Wei-Kang Huang
    Testing programmable interconnect systems: an algorithmic approach. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2000, pp:311-316 [Conf]
  6. Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lombardi
    The VPI-Based Combinational IP Core Module-Based Mixed Level Serial Fault Simulation and Test Generation Methodology. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 2003, pp:274-277 [Conf]
  7. Yinlei Yu, Jian Xu, Wei-Kang Huang, Fabrizio Lombardi
    A Diagnosis Method for Interconnects in SRAM Based FPGAs. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1998, pp:278-282 [Conf]
  8. Yinlei Yu, Jian Xu, Wei-Kang Huang, Fabrizio Lombardi
    Minimizing the Number of Programming Steps for Diagnosis of Interconnect Faults in FPGAs. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:357-362 [Conf]
  9. Lan Zhao, D. M. H. Walker, Fabrizio Lombardi
    IDDQ Testing of Input/Output Resources of SRAM-Based FPGAs. [Citation Graph (0, 0)][DBLP]
    Asian Test Symposium, 1999, pp:375-0 [Conf]
  10. Y. Bellan, Mario Costa, Giancarlo Ferrigno, Fabrizio Lombardi, Luca Macchiarulo, Alfonso Montuori, Eros Pasero, Camilla Rigotti
    Artificial Neural Networks for Motion Emulation in Virtual Environments. [Citation Graph (0, 0)][DBLP]
    CAPTECH, 1998, pp:83-99 [Conf]
  11. T. Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi
    Fault tolerant clockless wave pipeline design. [Citation Graph (0, 0)][DBLP]
    Conf. Computing Frontiers, 2004, pp:350-356 [Conf]
  12. Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lombardi
    Using Verilog VPI for Mixed Level Serial Fault Simulation in a Test Generation Environment. [Citation Graph (0, 0)][DBLP]
    Embedded Systems and Applications, 2003, pp:139-143 [Conf]
  13. Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli
    Novel designs for thermally robust coplanar crossing in QCA. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:786-791 [Conf]
  14. Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi
    Evaluation of Error-Resilience for Reliable Compression of Test Data. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1284-1289 [Conf]
  15. Jing Huang, Mariam Momenzadeh, Fabrizio Lombardi
    Defect tolerance of QCA tiles. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:774-779 [Conf]
  16. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Fault Tolerance of Programmable Switch Blocks. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1358-1359 [Conf]
  17. Luca Schiano, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli, Adelio Salsano
    On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:580-585 [Conf]
  18. Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Testing of Quantum Dot Cellular Automata Based Designs. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1408-1409 [Conf]
  19. Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi
    Scan Test of IP Cores in an ATE Environment. [Citation Graph (0, 0)][DBLP]
    DELTA, 2004, pp:281-286 [Conf]
  20. Y. Chang, Minsu Choi, Nohpill Park, Fabrizio Lombardi
    Repairability Evaluation of Embedded Multiple Region DRAMs. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:428-436 [Conf]
  21. D. G. Ashen, Fred J. Meyer, Nohpill Park, Fabrizio Lombardi
    Testing of programmable logic devices (PLD) with faulty resources. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:76-84 [Conf]
  22. Xiao-Tao Chen, Wei-Kang Huang, Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
    Novel Approaches for Fault Detection in Two-Dimensional Combinational Arrays. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:161-169 [Conf]
  23. Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri
    Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:419-427 [Conf]
  24. Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio Lombardi
    On the Modeling and Analysis of Jitter in ATE Using Matlab. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:285-293 [Conf]
  25. Wenyi Feng, Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi
    Reconfiguration of One-Time Programmable FPGAs with Faulty Logic Resources. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:368-376 [Conf]
  26. Wenyi Feng, Fred J. Meyer, Wei-Kang Huang, Fabrizio Lombardi
    On the Complexity of Sequential Testing in Configurable FPGAs. [Citation Graph (0, 0)][DBLP]
    DFT, 1998, pp:164-0 [Conf]
  27. Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
    Novel Control Pattern Generators for Interconnect Testing with Boundary Scan. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:112-120 [Conf]
  28. T. Feng, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi, Fred J. Meyer
    Reliability Modeling and Assurance of Clockless Wave Pipeline. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:442-450 [Conf]
  29. Hamidreza Hashempour, Fabrizio Lombardi
    ATE-Amenable Test Data Compression with No Cyclic Scan. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:151-158 [Conf]
  30. Hamidreza Hashempour, Fabrizio Lombardi
    Compression of VLSI Test Data by Arithmetic Coding. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:150-157 [Conf]
  31. Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi
    Test Time Reduction in a Manufacturing Environment by Combining BIST and ATE. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:186-194 [Conf]
  32. Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi
    Error-Resilient Test Data Compression Using Tunstall Codes. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:316-323 [Conf]
  33. Wei Liang Huang, Fred J. Meyer, Fabrizio Lombardi
    Multiple fault detection in logic resources of FPGAs. [Citation Graph (0, 0)][DBLP]
    DFT, 1997, pp:186-194 [Conf]
  34. Jing Huang, Mariam Momenzadeh, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Defect Characterization for Scaling of QCA Devices. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:30-38 [Conf]
  35. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:96-104 [Conf]
  36. Hannu Kari, Heikki Saikkonen, Fabrizio Lombardi
    Detection of Defective Media in Disks. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:49-55 [Conf]
  37. Farzin Karimi, Fabrizio Lombardi
    Parallel Testing of Multi-port Static Random Access Memories for BIST. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:271-279 [Conf]
  38. Farzin Karimi, Waleed Meleis, Zainalabedin Navabi, Fabrizio Lombardi
    Data Compression for System-on-Chip Testing Using ATE. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:166-176 [Conf]
  39. Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi
    Data Dependent Jitter (DDJ) Characterization Methodology. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:294-304 [Conf]
  40. Tong Liu, Fabrizio Lombardi
    On Soft Switch Programming for Reconfigurable Array Systems. [Citation Graph (0, 0)][DBLP]
    DFT, 1994, pp:203-211 [Conf]
  41. Fabrizio Lombardi, Nohpill Park
    Testing Layered Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:293-304 [Conf]
  42. Fred J. Meyer, Fabrizio Lombardi, Jun Zhao
    Good Processor Identification in Two-Dimensional Grids. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:348-356 [Conf]
  43. Mariam Momenzadeh, Jing Huang, Fabrizio Lombardi
    Defect Characterization and Tolerance of QCA Sequential Devices and Circuits. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:199-207 [Conf]
  44. Mariam Momenzadeh, Marco Ottavi, Fabrizio Lombardi
    Modeling QCA Defects at Molecular-level in Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:208-216 [Conf]
  45. Avinash Munshi, Fred J. Meyer, Fabrizio Lombardi
    A New Method for Testing EEPLA's. [Citation Graph (0, 0)][DBLP]
    DFT, 1998, pp:146-154 [Conf]
  46. Nohpill Park, Fabrizio Lombardi
    Stratified Testing of Multichip Module Systems under Uneven Known-Good-Yield. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:192-200 [Conf]
  47. Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
    Quality-Effective Repair of Multichip Module Systems. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:47-55 [Conf]
  48. Nohpill Park, S. J. Ruiwale, Fabrizio Lombardi
    Testing the Configurability of Dynamic FPGAs. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:311-319 [Conf]
  49. Pedram A. Riahi, Zainalabedin Navabi, Fabrizio Lombardi
    Simulating Faults of Combinational IP Core-based SOCs in a PLI Environment. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:389-397 [Conf]
  50. José Salinas, Fabrizio Lombardi
    On the Reconfigurable Operation of Arrays with Defects for Image Processing. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:88-95 [Conf]
  51. Luca Schiano, Fabrizio Lombardi
    On the Test and Diagnosis of the Perfect Shuffle. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:97-104 [Conf]
  52. Yinan N. Shen, Hannu Kari, S. S. Kim, Fabrizio Lombardi
    Scheduling Policies for Fault Tolerance in a VLSI Processor. [Citation Graph (0, 0)][DBLP]
    DFT, 1994, pp:1-9 [Conf]
  53. W. Shi, K. Kumar, Fabrizio Lombardi
    On the Complexity of Switch Programming in Fault-Tolerant-Configurable Chips. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:125-134 [Conf]
  54. Xiaojun Ma, Fabrizio Lombardi
    Multi-Site and Multi-Probe Substrate Testing on an ATE. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:495-506 [Conf]
  55. Xiaopeng Wang, Marco Ottavi, Fabrizio Lombardi
    Yield Analysis of Compiler-Based Arrays of Embedded SRAMs. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:3-10 [Conf]
  56. Xiaopeng Wang, Marco Ottavi, Fabrizio Lombardi
    Testing of Inter-Word Coupling Faults in Word-Oriented SRAMs. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:111-119 [Conf]
  57. Xiaopeng Wang, Marco Ottavi, Fred J. Meyer, Fabrizio Lombardi
    On The Yield of Compiler-Based eSRAMs. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:11-19 [Conf]
  58. Shanrui Zhang, Minsu Choi, Nohpill Park, Fabrizio Lombardi
    Probabilistic Balancing of Fault Coverage and Test Cost in Combined Built-In Self-Test/Automated Test Equipment Testing Environment. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:48-56 [Conf]
  59. Fengming Zhang, Young-Jun Lee, T. Kane, Luca Schiano, Mariam Momenzadeh, Yong-Bin Kim, Fred J. Meyer, Fabrizio Lombardi, S. Max, Phil Perkinson
    A Digital and Wide Power Bandwidth H-Field Generator for Automatic Test Equipment. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:159-166 [Conf]
  60. Hamidreza Hashempour, Fabrizio Lombardi
    A Novel Methodology for Functional Test Data Compression. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:128-135 [Conf]
  61. Fengming Zhang, Warren Necoechea, Peter Reiter, Yong-Bin Kim, Fabrizio Lombardi
    Load Board Designs Using Compound Dot Technique and Phase Detector for Hierarchical ATE Calibrations. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:486-494 [Conf]
  62. Xiaojun Ma, Jing Huang, Cecilia Metra, Fabrizio Lombardi
    Testing Reversible 1D Arrays for Molecular QCA. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:71-79 [Conf]
  63. Salvatore Pontarelli, Marco Ottavi, Vamsi Vankamamidi, Adelio Salsano, Fabrizio Lombardi
    Reliability Evaluation of Repairable/Reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:227-235 [Conf]
  64. Byunghyun Jang, Yong-Bin Kim, Fabrizio Lombardi
    Error Tolerance of DNA Self-Assembly by Monomer Concentration Control. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:89-97 [Conf]
  65. Tong Liu, Wei-Kang Huang, Fabrizio Lombardi
    Testing of Uncustomized Segmented Channel Field Programmable Gate Arrays. [Citation Graph (0, 0)][DBLP]
    FPGA, 1995, pp:125-131 [Conf]
  66. Fabrizio Lombardi, David Ashen, Xiao-Tao Chen, Wei-Kang Huang
    Diagnosing Programmable Interconnect Systems for FPGAs. [Citation Graph (0, 0)][DBLP]
    FPGA, 1996, pp:100-106 [Conf]
  67. Lan Zhao, D. M. H. Walker, Fabrizio Lombardi
    Bridging Fault Detection in FPGA Interconnects Using IDDQ. [Citation Graph (0, 0)][DBLP]
    FPGA, 1998, pp:95-104 [Conf]
  68. Chao Feng, Wei-Kang Huang, Fabrizio Lombardi
    A New Diagnosis Approach for Short Faults in Interconnects. [Citation Graph (0, 0)][DBLP]
    FTCS, 1995, pp:331-339 [Conf]
  69. Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
    Two-Step Algorithms for Maximal Diagnosis of Wiring Interconnects. [Citation Graph (0, 0)][DBLP]
    FTCS, 1999, pp:130-137 [Conf]
  70. Fred J. Meyer, Xiao-Tao Chen, Wei-Kang Huang, Fabrizio Lombardi
    Using Virtual Links for Reliable Information Retrieval Across Point-to-Point Networks. [Citation Graph (0, 0)][DBLP]
    FTCS, 1997, pp:216-225 [Conf]
  71. Hamidreza Hashempour, Fabrizio Lombardi
    Evaluation of heuristic techniques for test vector ordering. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:96-99 [Conf]
  72. Hamidreza Hashempour, Fabrizio Lombardi
    Two dimensional reordering of functional test data for compression by ATE. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:188-192 [Conf]
  73. Hamidreza Hashempour, Luca Schiano, Fabrizio Lombardi
    Enhancing error resilience for reliable compression of VLSI test data. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:371-376 [Conf]
  74. Jing Huang, Mariam Momenzadeh, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Design and characterization of an and-or-inverter (AOI) gate for QCA implementation. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:426-429 [Conf]
  75. Marco Ottavi, Xiaopeng Wang, Fred J. Meyer, Fabrizio Lombardi
    Simulation of reconfigurable memory core yield. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2004, pp:136-140 [Conf]
  76. Vamsi Vankamamidi, Marco Ottavi, Fabrizio Lombardi
    Tile-based design of a serial memory in QCA. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:201-206 [Conf]
  77. Naghmeh Karimi, Shahrzad Mirkhani, Zainalabedin Navabi, Fabrizio Lombardi
    RT level reliability enhancement by constructing dynamic TMRS. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:172-175 [Conf]
  78. Xiao-Tao Chen, Fabrizio Lombardi
    A coloring approach to the structural diagnosis of interconnects. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1996, pp:676-680 [Conf]
  79. Peter Koo, Fabrizio Lombardi, Donatella Sciuto
    A Routing Algorithm for Harvesting Multipipeline Arrays with Small Intercell and Pipeline Delays. [Citation Graph (0, 0)][DBLP]
    ICCAD, 1990, pp:2-5 [Conf]
  80. Yinan N. Shen, Nohpill Park, Fabrizio Lombardi
    Space Cutting Approaches for Repairing Memories. [Citation Graph (0, 0)][DBLP]
    ICCD, 1996, pp:106-111 [Conf]
  81. X. Tan, J. Tong, P. Tan, Nohpill Park, Fabrizio Lombardi
    An Efficient Multi-Way Algorithm for Balanced Partitioning of VLSI Circuits. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:608-613 [Conf]
  82. José Salinas, Nohpill Park, U. Arunkumar, Fabrizio Lombardi
    Conformance Testing of Time-Dependent Protocols. [Citation Graph (0, 0)][DBLP]
    ICECCS, 1996, pp:257-264 [Conf]
  83. Chao Feng, Laxmi N. Bhuyan, Fabrizio Lombardi
    An Adaptive System-Level Diagnosis Approach for Mesh Connected Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:153-157 [Conf]
  84. Tong Liu, Wei-Kang Huang, Fabrizio Lombardi, Laxmi N. Bhuyan
    A Submesh Allocation Scheme for Mesh-Connected Multiprocessor Systems. [Citation Graph (0, 0)][DBLP]
    ICPP (2), 1995, pp:159-163 [Conf]
  85. V. Purohit, Fabrizio Lombardi, Susumu Horiguchi, J. H. Kim
    Diagnosing Multiple Bridge Faults in Baseline Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1995, pp:131-135 [Conf]
  86. José Salinas, Fabrizio Lombardi
    Emulating Reconfigurable Arrays for Image Processing Using the MasPar Architecture. [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:141-148 [Conf]
  87. José Salinas, Fabrizio Lombardi
    Rank Order Filtering on an Array With Faulty Processors. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1994, pp:236-240 [Conf]
  88. Yinan N. Shen, Xiao-Tao Chen, Susumu Horiguchi, Fabrizio Lombardi
    On the multiple fault diagnosis of multistage interconnection networks: the lower bound and the CMOS fault model. [Citation Graph (0, 0)][DBLP]
    ICPP, 1997, pp:350-0 [Conf]
  89. Farzin Karimi, Fabrizio Lombardi
    A Scan-Bist Environment for Testing Embedded Memories. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:211-0 [Conf]
  90. Minsu Choi, Nohpill Park, Fabrizio Lombardi
    Hardware-Software Co-Reliability in Field Reconfigurable Multi-Processor-Memory Systems. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2002, pp:- [Conf]
  91. Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
    Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping. [Citation Graph (0, 0)][DBLP]
    IPDPS Workshops, 2000, pp:951-958 [Conf]
  92. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Probabilistic Analysis of Fault Tolerance of FPGA Switch Block Array. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  93. Amitabh Mishra, Yeimkuan Chang, Laxmi N. Bhuyan, Fabrizio Lombardi
    Fault-tolerant sorting in SIMD hypercubes. [Citation Graph (0, 0)][DBLP]
    IPPS, 1995, pp:312-318 [Conf]
  94. Mariam Momenzadeh, Mehdi Baradaran Tahoori, Jing Huang, Fabrizio Lombardi
    Quantum Cellular Automata: New Defects and Faults for New Devices. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  95. D. Schin, Yinan N. Shen, Fabrizio Lombardi
    An Approach for UIO Generation for FSM Verification and Validation. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1994, pp:303-306 [Conf]
  96. Marco Ottavi, Luca Schiano, Fabrizio Lombardi, Salvatore Pontarelli, Gian-Carlo Cardarilli
    Evaluating the Data Integrity of Memory Systems by Configurable Markov Models. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:257-259 [Conf]
  97. Marco Ottavi, Vamsi Vankamamidi, Fabrizio Lombardi, Salvatore Pontarelli, Adelio Salsano
    Design of a QCA Memory with Parallel Read/Serial Write. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:292-294 [Conf]
  98. Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi, Farzin Karimi
    Hybrid Multisite Testing at Manufacturing. [Citation Graph (0, 0)][DBLP]
    ITC, 2003, pp:927-936 [Conf]
  99. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Routability and Fault Tolerance of FPGA Interconnect Architectures. [Citation Graph (0, 0)][DBLP]
    ITC, 2004, pp:479-488 [Conf]
  100. Yinan N. Shen, Fabrizio Lombardi
    Location and Identification for Single and Multiple Faults in Testable Redundant PLAs for Yield Enhancement. [Citation Graph (0, 0)][DBLP]
    ITC, 1989, pp:670-678 [Conf]
  101. Lan Zhao, D. M. H. Walker, Fabrizio Lombardi
    Detection of bridging faults in logic resources of configurable FPGAs using I_DDQ. [Citation Graph (0, 0)][DBLP]
    ITC, 1998, pp:1037-0 [Conf]
  102. Hannu Kari, Heikki Saikkonen, Fabrizio Lombardi
    On the Methods to Detect Sector Faults of a Disk Subsystem. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 1993, pp:317-322 [Conf]
  103. Hannu Kari, Heikki Saikkonen, Fabrizio Lombardi
    Detecting Latent Sector Faults in Modern SCSI Disks. [Citation Graph (0, 0)][DBLP]
    MASCOTS, 1994, pp:403-404 [Conf]
  104. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Diagnosing the Interconnect of Bus-Connected Multi-RAM Systems under Restricted and General Fault Models. [Citation Graph (0, 0)][DBLP]
    MTDT, 2000, pp:14-19 [Conf]
  105. Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri
    Optimal Spare Utilization in Repairable and Reliable Memory Cores. [Citation Graph (0, 0)][DBLP]
    MTDT, 2003, pp:64-71 [Conf]
  106. Luca Schiano, Marco Ottavi, Fabrizio Lombardi
    Markov Models of Fault-Tolerant Memory Systems under SEU. [Citation Graph (0, 0)][DBLP]
    MTDT, 2004, pp:38-43 [Conf]
  107. Farzin Karimi, Fred J. Meyer, Fabrizio Lombardi
    Random Testing of Multi-Port Static Random Access Memories. [Citation Graph (0, 0)][DBLP]
    MTDT, 2002, pp:101-108 [Conf]
  108. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Interconnect Diagnosis of Bus-Connected Multi-RAM Systems. [Citation Graph (0, 0)][DBLP]
    MTDT, 1999, pp:40-47 [Conf]
  109. Farzin Karimi, Fabrizio Lombardi
    A Scan-Bist Environment for Testing Embedded Memories. [Citation Graph (0, 0)][DBLP]
    MTDT, 2002, pp:17-0 [Conf]
  110. Farzin Karimi, Fabrizio Lombardi, V. Swamy Irrinki, T. Crosby
    A Parallel Approach for Testing Multi-Port Static Random Access Memories. [Citation Graph (0, 0)][DBLP]
    MTDT, 2001, pp:73-0 [Conf]
  111. Mohammad A. Al-Hashimi, Huay-min H. Pu, Nohpill Park, Fabrizio Lombardi
    Dependability under Malicious Agreement in N-modular Redundancy-on-Demand Systems. [Citation Graph (0, 0)][DBLP]
    NCA, 2001, pp:80-93 [Conf]
  112. Minsu Choi, N.-J. Park, K. M. George, Byoungjae Jin, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi
    Fault Tolerant Memory Design for HW/SW Co-Reliability in Massively Parallel Computing Systems. [Citation Graph (0, 0)][DBLP]
    NCA, 2003, pp:341-0 [Conf]
  113. Fabrizio Lombardi, Nohpill Park, Mohammad A. Al-Hashimi, Huay-min H. Pu
    Modeling the Dependability of N-Modular Redundancy on Demand under Malicious Agreement. [Citation Graph (0, 0)][DBLP]
    PRDC, 2001, pp:68-75 [Conf]
  114. Minsu Choi, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi
    Hardware/Software Co-Reliability of Configurable Digital Systems. [Citation Graph (0, 0)][DBLP]
    PRDC, 2002, pp:67-74 [Conf]
  115. Minsu Choi, Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
    Connectivity-Based Multichip Module Repair. [Citation Graph (0, 0)][DBLP]
    PRDC, 2001, pp:19-26 [Conf]
  116. Yinan N. Shen, Fabrizio Lombardi, Anton T. Dahbura
    Protocol Conformance Testing Using Multiple UIO Sequences. [Citation Graph (0, 0)][DBLP]
    PSTV, 1989, pp:131-143 [Conf]
  117. X. Sun, Yinan N. Shen, Fabrizio Lombardi, Donatella Sciuto
    Protocol Conformance Testing by Discriminating UIO Sequences. [Citation Graph (0, 0)][DBLP]
    PSTV, 1991, pp:349-364 [Conf]
  118. A. Kovaleski, S. Ratheal, Fabrizio Lombardi
    An Architecture and an Interconnection Scheme for Time-Sliced Buses in Real-Time Processing. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1986, pp:20-27 [Conf]
  119. Fabrizio Lombardi, Donatella Sciuto, Renato Stefanelli
    A Technique for Reconfiguring Two Dimensional VLSI Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1987, pp:44-53 [Conf]
  120. Fabrizio Lombardi, Chin-Long Wey
    On a Multiprocessor System with Dynamic Redundancy. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1985, pp:3-12 [Conf]
  121. Salih Yurttaq, Fabrizio Lombardi
    New Approaches for the Reconfiguration of Two-Dimensional VLSI Arrays Using Time-Redundancy. [Citation Graph (0, 0)][DBLP]
    IEEE Real-Time Systems Symposium, 1988, pp:212-221 [Conf]
  122. Chao Feng, Laxmi N. Bhuyan, Fabrizio Lombardi
    An Adaptive System-Level Diagnosis Approach for Hypercube Multiprocessors. [Citation Graph (0, 0)][DBLP]
    SPDP, 1993, pp:460-469 [Conf]
  123. Yinan N. Shen, Fabrizio Lombardi, Donatella Sciuto
    Evaluation and improvement of fault coverage for verification and validation of protocols. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:200-207 [Conf]
  124. Fabrizio Lombardi, Yinan N. Shen, Jon C. Muzio
    On the testability of array structures for FFT computation. [Citation Graph (0, 0)][DBLP]
    SPDP, 1990, pp:519-522 [Conf]
  125. X. Sun, Yinan N. Shen, Fabrizio Lombardi
    On the Verification and Validation of Protocols with High Fault Coverage Using UIO Sequences. [Citation Graph (0, 0)][DBLP]
    Symposium on Reliable Distributed Systems, 1992, pp:196-203 [Conf]
  126. Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi
    On the Fault Coverage of Interconnect Diagnosis. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:101-109 [Conf]
  127. Wei-Kang Huang, Xiao-Tao Chen, Fabrizio Lombardi
    On the diagnosis of programmable interconnect systems: Theory and application. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:204-211 [Conf]
  128. Wei-Kang Huang, Fabrizio Lombardi
    An approach for testing programmable/configurable field programmable gate arrays. [Citation Graph (0, 0)][DBLP]
    VTS, 1996, pp:450-455 [Conf]
  129. Tong Liu, Fabrizio Lombardi, José Salinas
    Diagnosis of interconnects and FPICs using a structured walking-1 approach. [Citation Graph (0, 0)][DBLP]
    VTS, 1995, pp:256-261 [Conf]
  130. Mehdi Baradaran Tahoori, Mariam Momenzadeh, Jing Huang, Fabrizio Lombardi
    Defects and Faults in Quantum Cellular Automata at Nano Scale. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:291-296 [Conf]
  131. X. Ma, Jing Huang, Fabrizio Lombardi
    Error Tolerance in DNA Self-Assembly by (2k-1) x (2k-1) Snake Tile Sets. [Citation Graph (0, 0)][DBLP]
    VTS, 2007, pp:131-140 [Conf]
  132. Jun Zhao, V. Swamy Irrinki, Mukesh Puri, Fabrizio Lombardi
    Detection of Inter-Port Faults in Multi-Port Static RAMs. [Citation Graph (0, 0)][DBLP]
    VTS, 2000, pp:297-304 [Conf]
  133. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Fault Detection and Diagnosis of Interconnects of Random Access Memories. [Citation Graph (0, 0)][DBLP]
    VTS, 1998, pp:42-47 [Conf]
  134. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Maximal Diagnosis of Interconnects of Random Access Memories. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:378-383 [Conf]
  135. Fabrizio Lombardi
    Analysis of Comparison-Based Diagnosable Systems Using Temporal Criteria. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1988, v:31, n:3, pp:201-208 [Journal]
  136. Chin-Long Wey, Fabrizio Lombardi
    On a Novel Self-Test Approach to Digital Testing. [Citation Graph (0, 0)][DBLP]
    Comput. J., 1987, v:30, n:3, pp:258-267 [Journal]
  137. R. Iris Bahar, Mehdi Baradaran Tahoori, Sandeep K. Shukla, Fabrizio Lombardi
    Guest Editors' Introduction: Challenges for Reliable Design at the Nanoscale. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:4, pp:295-297 [Journal]
  138. Xiao-Tao Chen, Wei-Kang Huang, Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
    Design Verification of FPGA Implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:2, pp:66-73 [Journal]
  139. Bruce F. Cockburn, Fabrizio Lombardi, Fred J. Meyer
    Guest Editors' Introduction: DRAM Architecture and Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:19-21 [Journal]
  140. André Ivanov, Fabrizio Lombardi, Cecilia Metra
    Guest Editors' Introduction: Advances in VLSI Testing at MultiGbps Rates. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:4, pp:274-276 [Journal]
  141. Soha Hassoun, Yong-Bin Kim, Fabrizio Lombardi
    Guest Editors' Introduction: Clockless VLSI Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:5-8 [Journal]
  142. Fabrizio Lombardi
    Field-Programmable Gate Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:1, pp:8-9 [Journal]
  143. Fabrizio Lombardi, Cecilia Metra
    Guest Editors' Introduction: Defect-Oriented Diagnosis for Very Deep-Submicron Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:1, pp:8-9 [Journal]
  144. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi
    Analyzing and Diagnosing Interconnect Faults in Bus-Structured Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:1, pp:54-64 [Journal]
  145. Jing Huang, Mariam Momenzadeh, Luca Schiano, Marco Ottavi, Fabrizio Lombardi
    Tile-based QCA design using majority-like logic primitives. [Citation Graph (0, 0)][DBLP]
    JETC, 2005, v:1, n:3, pp:163-185 [Journal]
  146. Marco Ottavi, Luca Schiano, Fabrizio Lombardi, Douglas Tougaw
    HDLQ: A HDL environment for QCA design. [Citation Graph (0, 0)][DBLP]
    JETC, 2006, v:2, n:4, pp:243-261 [Journal]
  147. A. Kovaleski, S. Ratheal, Fabrizio Lombardi
    An Architecture and an Interconnection Scheme for Time-Sliced Buses. [Citation Graph (0, 0)][DBLP]
    J. Parallel Distrib. Comput., 1987, v:4, n:2, pp:209-229 [Journal]
  148. Minsu Choi, Nohpill Park, Vincenzo Piuri, Yong-Bin Kim, Fabrizio Lombardi
    Balanced dual-stage repair for dependable embedded memory cores. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2004, v:50, n:5, pp:281-285 [Journal]
  149. Dimiter R. Avresky, Fabrizio Lombardi, Karl-Erwin Großpietsch, Barry W. Johnson
    Guest Editors' Introduction: Fault-Tolerant Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2001, v:21, n:5, pp:12-15 [Journal]
  150. Wenyi Feng, Farzin Karimi, Fabrizio Lombardi
    Fault Detection in a Tristate System Environment. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2001, v:21, n:5, pp:77-85 [Journal]
  151. Yinan N. Shen, Fabrizio Lombardi
    Graph Algorithms for Conformance Testing Using the Rural ChinesePostman Tour. [Citation Graph (0, 0)][DBLP]
    SIAM J. Discrete Math., 1996, v:9, n:4, pp:511-529 [Journal]
  152. Hannu Kari, José Salinas, Fabrizio Lombardi
    Generating non-standard random distributions for discrete event simulation systems. [Citation Graph (0, 0)][DBLP]
    Simul. Pr. Theory, 1994, v:1, n:4, pp:173-193 [Journal]
  153. Dimiter R. Avresky, Barry W. Johnson, Fabrizio Lombardi
    Guest Editors' Introduction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:2, pp:97-99 [Journal]
  154. Chao Feng, Laxmi N. Bhuyan, Fabrizio Lombardi
    Adaptive System-Level Diagnosis for Hypercube Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:10, pp:1157-1170 [Journal]
  155. Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi
    Adaptive Algorithms for Maximal Diagnosis of Wiring Interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:10, pp:1259-1270 [Journal]
  156. Haldun Hadimioglu, David R. Kaeli, Fabrizio Lombardi
    Introduction to the Special Section on High Performance Memory Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2001, v:50, n:11, pp:1103-1104 [Journal]
  157. Hamidreza Hashempour, Fabrizio Lombardi
    Application of Arithmetic Coding to Compression of VLSI Test Data. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:9, pp:1166-1177 [Journal]
  158. Wei-Kang Huang, Fabrizio Lombardi
    On the Constant Diagnosability of Baseline Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:12, pp:1485-1488 [Journal]
  159. Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi
    An Approach for Detecting Multiple Faulty FPGA Logic Blocks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:1, pp:48-54 [Journal]
  160. Jien-Chung Lo, Cecilia Metra, Fabrizio Lombardi
    Guest Editors' Introduction: Special Section on Design and Test of Systems-on-Chip (SoC). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:2, pp:97-98 [Journal]
  161. Fabrizio Lombardi, Chao Feng, Wei-Kang Huang
    Detection and Location of Multiple Faults in Baseline Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1992, v:41, n:10, pp:1340-1344 [Journal]
  162. Fabrizio Lombardi, Wei-Kang Huang
    Fault Detection and Design Complextity in C-Testable VLSI Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1990, v:39, n:12, pp:1477-1481 [Journal]
  163. Fabrizio Lombardi, Mariagiovanna Sami
    Guest Editors' Introduction. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:6, pp:529-531 [Journal]
  164. Bin Liu, Fabrizio Lombardi, Nohpill Park, Minsu Choi
    Testing Layered Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2004, v:53, n:6, pp:710-722 [Journal]
  165. Viktor K. Prasanna, Fabrizio Lombardi
    Editor's Note. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2005, v:54, n:2, pp:97-0 [Journal]
  166. Viktor K. Prasanna, Fabrizio Lombardi
    Editors' Note. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:1, pp:1- [Journal]
  167. José Salinas, Yinan N. Shen, Fabrizio Lombardi
    A Sweeping Line Approach to Interconnect Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:8, pp:917-929 [Journal]
  168. Donatella Sciuto, Fabrizio Lombardi
    On Functional Testing of Array Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1480-1484 [Journal]
  169. Jun Zhao, V. Swamy Irrinki, Mukesh Puri, Fabrizio Lombardi
    Testing SRAM-Based Content Addressable Memories. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2000, v:49, n:10, pp:1054-1063 [Journal]
  170. André DeHon, Craig S. Lent, Fabrizio Lombardi
    Introduction to the Special Section on Nano Systems and Computing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:2, pp:145-146 [Journal]
  171. Lan Zhao, D. M. H. Walker, Fabrizio Lombardi
    IDDQ Testing of Bridging Faults in Logic Resources of Reconfigurable Field Programmable Gate Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1998, v:47, n:10, pp:1136-1152 [Journal]
  172. Fabrizio Lombardi
    Editor's Note. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:6, pp:721-726 [Journal]
  173. Wei-Kang Huang, Fabrizio Lombardi
    On an improved design approach for C-testable orthogonal iterative arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:5, pp:609-615 [Journal]
  174. Wei-Kang Huang, Yinan N. Shen, Fabrizio Lombardi
    New approaches for the repairs of memories with redundancy by row/column deletion for yield enhancement. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:3, pp:323-328 [Journal]
  175. Tong Liu, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi
    Testing and testable designs for one-time programmable FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2000, v:19, n:11, pp:1370-1375 [Journal]
  176. Fabrizio Lombardi, Donatella Sciuto, Renato Stefanelli
    An algorithm for functional reconfiguration of fixed-size arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1988, v:7, n:10, pp:1114-1118 [Journal]
  177. Fabrizio Lombardi, Mariagiovanna Sami, Renato Stefanelli
    Reconfiguration of VLSI arrays by covering. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1989, v:8, n:9, pp:952-965 [Journal]
  178. Mariam Momenzadeh, Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Characterization, test, and logic synthesis of and-or-inverter (AOI) gate design for QCA implementation. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:12, pp:1881-1893 [Journal]
  179. Chin-Long Wey, Fabrizio Lombardi
    On the Repair of Redundant RAM's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1987, v:6, n:2, pp:222-231 [Journal]
  180. Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi
    Structural diagnosis of interconnects by coloring. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Design Autom. Electr. Syst., 1998, v:3, n:2, pp:249-271 [Journal]
  181. Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi
    Fault Tolerance of Switch Blocks and Switch Block Arrays in FPGA. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2005, v:13, n:7, pp:794-807 [Journal]
  182. Hamidreza Hashempour, Fabrizio Lombardi
    Circuit-level modeling and detection of metallic carbon nanotube defects in carbon nanotube FETs. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:841-846 [Conf]
  183. Luca Schiano, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli, Adelio Salsano
    On the Analysis of Reed Solomon Coding for Resilience to Transient/Permanent Faults in Highly Reliable Memories [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
  184. Jing Huang, Mariam Momenzadeh, Fabrizio Lombardi
    Analysis of missing and additional cell defects in sequential quantum-dot cellular automata. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:4, pp:503-515 [Journal]
  185. Jun Zhao, Fred J. Meyer, Nohpill Park, Fabrizio Lombardi
    Sequential diagnosis of processor array systems. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Reliability, 2004, v:53, n:4, pp:487-498 [Journal]
  186. Jun Zhao, Fred J. Meyer, Fabrizio Lombardi, Nohpill Park
    Maximal diagnosis of interconnects of random access memories. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Reliability, 2003, v:52, n:4, pp:423-434 [Journal]
  187. H. Lin, Fabrizio Lombardi, M. Lu
    On the optimal reconfiguration of multipipeline arrays in the presence of faulty processing and switching elements. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1993, v:1, n:1, pp:76-79 [Journal]
  188. Wei-Kang Huang, Fred J. Meyer, Xiao-Tao Chen, Fabrizio Lombardi
    Testing configurable LUT-based FPGA's. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:2, pp:276-283 [Journal]
  189. Tong Liu, Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi
    Test generation and scheduling for layout-based detection of bridge faults in interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:1, pp:48-55 [Journal]
  190. Farzin Karimi, V. Swamy Irrinki, T. Crosby, Nohpill Park, Fabrizio Lombardi
    Parallel testing of multi-port static random access memories. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2003, v:34, n:1, pp:3-21 [Journal]
  191. Gian-Carlo Cardarilli, Fabrizio Lombardi, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    A Comparative Evaluation of Designs for Reliable Memory Systems. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2005, v:21, n:4, pp:429-444 [Journal]
  192. Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, Salvatore Pontarelli
    QCA Circuits for Robust Coplanar Crossing. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2007, v:23, n:2-3, pp:193-210 [Journal]
  193. Jing Huang, Mariam Momenzadeh, Fabrizio Lombardi
    On the Tolerance to Manufacturing Defects in Molecular QCA Tiles for Processing-by-wire. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2007, v:23, n:2-3, pp:163-174 [Journal]

  194. Error Detection/Correction in DNA Algorithmic Self-Assembly. [Citation Graph (, )][DBLP]


  195. Fault Tolerant Schemes for QCA Systems. [Citation Graph (, )][DBLP]


  196. Testing Reversible One-Dimensional QCA Arrays for Multiple Faults. [Citation Graph (, )][DBLP]


  197. Error Tolerance of DNA Self-Healing Assemblies by Puncturing. [Citation Graph (, )][DBLP]


  198. A Scalable Framework for Defect Isolation of DNA Self-assemlbled Networks. [Citation Graph (, )][DBLP]


  199. A Tile-Based Error Model for Forward Growth of DNA Self-Assembly. [Citation Graph (, )][DBLP]


  200. Checkpointing of Rectilinear Growth in DNA Self-Assembly. [Citation Graph (, )][DBLP]


  201. Errors in DNA Self-Assembly by Synthesized Tile Sets. [Citation Graph (, )][DBLP]


  202. A Novel Hardened Design of a CMOS Memory Cell at 32nm. [Citation Graph (, )][DBLP]


  203. Coded DNA Self-Assembly for Error Detection/Location. [Citation Graph (, )][DBLP]


  204. A low leakage 9t sram cell for ultra-low power operation. [Citation Graph (, )][DBLP]


  205. Design of defect tolerant tile-based QCA circuits. [Citation Graph (, )][DBLP]


  206. Read-out schemes for a CNTFET-based crossbar memory. [Citation Graph (, )][DBLP]


  207. 8Gb/s capacitive low power and high speed 4-PWAM transceiver design. [Citation Graph (, )][DBLP]


  208. Manufacturing yield of QCA circuits by synthesized DNA self-assembled templates. [Citation Graph (, )][DBLP]


  209. A Novel Fault Tolerant Approach for SRAM-Based FPGAs. [Citation Graph (, )][DBLP]


  210. On a new approach for enhancing the fault coverage of conformance testing of protocols. [Citation Graph (, )][DBLP]


  211. A Metric for Assessing the Error Tolerance of Tile Sets for Punctured DNA Self-Assemblies. [Citation Graph (, )][DBLP]


  212. Low power 8T SRAM using 32nm independent gate FinFET technology. [Citation Graph (, )][DBLP]


  213. An Overview of Nanoscale Devices and Circuits. [Citation Graph (, )][DBLP]


  214. Guest Editors' Introduction: The State of the Art in Nanoscale CAD. [Citation Graph (, )][DBLP]


  215. Device Model for Ballistic CNFETs Using the First Conducting Band. [Citation Graph (, )][DBLP]


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